Fault tolerant system based on voting
US5907671A · kind A · utility
24Cited by
8References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 1996 |
| Grant date | May 25, 1999 |
| Priority date | — |
| Expiry date | Sep 23, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1032
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A fault tolerant circuit having improved error correction and detection properties takes advantage of two distinct forms of information redundancy: modular redundancy and parity check bit redundancy, in a cooperative fashion. In particular, it is shown that simple majority voting logic circuits, when employed in the subject environment, provide an easily realized mechanism for error correction and error detection. This results in an extremely fault tolerant information system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.