Cross-connected memory system for allocating pool buffers in each frame buffer and providing addresses thereof
US5907717A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 23, 1996 |
| Grant date | May 25, 1999 |
| Priority date | — |
| Expiry date | Feb 23, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L12/433
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A serial data interface device is coupled to electronic devices or other data transmitters or receivers, such as disk, optical, tape or CD-ROM drives, computers, printers, etc. The interface includes first and second ports capable of receiving and transmitting information to respective electronic devices, and first and second storage devices, such as frame buffers, for storing information. Each of the storage devices is coupled to both the first and second ports and are coupled to another electronic device. Included in each storage device is a main memory that is coupled to at least one of the electronic devices and at least one of the ports. A control memory that is coupled to the main memory is also included, along with a main memory arbiter that is coupled to the control memory and the main memory. Further included is a buffer allocation control that is coupled to the at least one electronic device and at least one of the ports. The main memory preferably includes at least four pool buffers which are allocated to data frames in a predetermined manner. The preferred method of allocating the pool buffers for inbound and outbound data comprises the steps of allocating a minimum num…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.