Refresh-ahead and burst refresh preemption technique for managing DRAM in computer system
US5907857A · kind A · utility
23Cited by
11References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 7, 1997 |
| Grant date | May 25, 1999 |
| Priority date | — |
| Expiry date | Apr 7, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/406
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system refreshes dynamic memory in a burst, but allows other memory access requests to preempt a burst refresh before the burst completes. In another aspect, once a burst refresh begins, it is allowed to continue for a number of refresh cycles which is greater than the number of refresh cycles then due; that is, until a time when the number of refresh cycles due is negative. This technique, referred to herein as "refresh-ahead", effectively helps to shift memory refresh activity into periods of bus time which would otherwise be idle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.