OPTI CO., LTD.
44Patents
2Active
44Granted
37Portfolio score
Filing activity: Jan 25, 1974 → May 29, 2014 · 1 expiring within 5 years
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5790831A | VL-bus/PCI-bus bridge | Physics | 116 | Expired |
| US5371880A | Bus synchronization apparatus and method | Physics | 107 | Expired |
| US5469555A | Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system | Physics | 101 | Expired |
| US5710906A | Predictive snooping of cache memory for master-initiated accesses | Physics | 92 | Expired |
| US5287481A | Automatic cache flush with readable and writable cache tag memory | Physics | 89 | Expired |
| US5550515A | Multiphase clock synthesizer having a plurality of phase shifted inputs to a plurality of phase comparators in a phase locked loop | Electricity | 70 | Expired |
| US5426739A | Local bus - I/O Bus Computer Architecture | Physics | 60 | Expired |
| US5423019A | Automatic cache flush with readable and writable cache tag memory | Physics | 50 | Expired |
| US5933611A | Dynamic scheduler for time multiplexed serial bus | Physics | 43 | Expired |
| US5805905A | Method and apparatus for arbitrating requests at two or more levels of priority using a single request line | Emerging Cross-Sectional Technologies | 40 | Expired |
| US5854638A | Unified memory architecture with parallel access by host and video controller | Physics | 38 | Expired |
| US3962007A | Method of making slide-fastener stringers | Emerging Cross-Sectional Technologies | 33 | Expired |
| US6567875B1 | USB data serializer | Physics | 32 | Expired |
| US5309568A | Local bus design | Physics | 32 | Expired |
| US5918072A | System for controlling variable length PCI burst data using a dummy final data phase and adjusting the burst length during transaction | Physics | 28 | Expired |
| US5414827A | Automatic cache flush | Physics | 27 | Expired |
| US5907857A | Refresh-ahead and burst refresh preemption technique for managing DRAM in computer system | Physics | 23 | Expired |
| US5768624A | Method and apparatus for employing ping-pong buffering with one level deep buffers for fast DRAM access | Physics | 22 | Expired |
| US5463759A | Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system | Physics | 21 | Expired |
| US5448742A | Method and apparatus for local memory and system bus refreshing with single-port memory controller and rotating arbitration priority | Physics | 20 | Expired |
| US5813036A | Predictive snooping of cache memory for master-initiated accesses | Physics | 19 | Expired |
| US5900016A | System for using a cache memory with a write-back architecture | Physics | 17 | Expired |
| US5822768A | Dual ported memory for a unified memory architecture | Physics | 16 | Expired |
| US5881271A | System and method for clock management | Physics | 14 | Expired |
| US5577214A | Programmable hold delay | Physics | 14 | Expired |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.