Patent · US Expired

Method for producing a CMOS circuit

US5913115A · kind A · utility

4Cited by
7References
7Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 29, 1998
Grant dateJun 15, 1999
Priority date
Expiry dateApr 29, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/038
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In producing a CMOS circuit, an n-channel MOS transistor and a p-channel MOS transistor are formed in a semiconductor substrate. In situ p-doped, monocrystalline silicon structures are formed by epitaxial growth selectively with respect to insulating material and with respect to n-doped silicon, such silicon structures being suitable as a diffusion source for forming source/drain regions of the p-channel MOS transistor. The source/drain regions of the n-channel MOS transistor are produced beforehand by means of implantation or diffusion. Owing to the selectivity of the epitaxy that is used, it is not necessary to cover the n-doped source/drain regions of the n-channel MOS transistor during the production of the p-channel MOS transistor.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.