Method and system for an extensible on silicon bus supporting multiple functional blocks
US5915103A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 1996 |
| Grant date | Jun 22, 1999 |
| Priority date | — |
| Expiry date | Dec 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4027
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention comprises a multiple functional block integrated circuit device for connecting to an external peripheral component interconnect (PCI) bus. The present invention includes an integrated circuit adapted to be coupled to an external PCI bus. The integrated circuit includes a plurality of functional blocks. Each of the plurality of functional blocks performs a function and comprises either a master functional block or a target functional block. A target bus adapted to transmit data signals is integral with the integrated circuit. The target bus is coupled to each of the plurality of functional blocks. A master bus adapted to transmit data signals is also integral with the integrated circuit. The master bus is coupled to each master functional block. A target bus interface integral with the integrated circuit is coupled to the target bus. The target bus interface is adapted to be coupled to the external PCI bus and to each of the plurality of functional blocks and interfaces each of the plurality of functional blocks to the external PCI bus. A master bus interface integral with the integrated circuit is coupled to the master bus. The master bus interface is adapted …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.