Method for fabricating a semiconductor device with improved device integration and field-region insulation
US5915191A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 4, 1997 |
| Grant date | Jun 22, 1999 |
| Priority date | — |
| Expiry date | Feb 4, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76237
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for the fabrication of a semiconductor device is characterized by a series of steps comprising successively forming a trench in a field region of monosilicon substrate and forming an oxidation-preventive layer and a silicon layer in the trench, and oxidizing the silicon layer into a field oxide film to produce a channel stop region beneath the trench in the substrate. The method alternatively comprises forming a trench having a small pattern in a field region of a monosilicon substrate, sequentially forming an oxidation-preventive layer and a silicon layer on the surface of the trench, and oxidizing the silicon layer and the substrate of a field region having a large pattern size, at the same time, to produce a field oxide film and channel stop diffusion regions below both the trench and the field oxide film having a large pattern. Such channel stop diffusion regions contribute to minimizing the redistribution of channel stop ions in the monosilicon substrate below both the trench and the field oxide film having a large pattern. In addition, the channel stop diffusion region restrains stress caused by oxidation of the monosilicon substrate and improves the insulation prope…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.