Contact process using taper contact etching and polycide step
US5915198A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 1997 |
| Grant date | Jun 22, 1999 |
| Priority date | — |
| Expiry date | Apr 28, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/90
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure are disclosed related to tapered contact holes in VLSI and ULSI technologies. The contact hole is formed by taking advantage of two-tiered polycide lines formed with a step. The polycide lines with steps are further formed with oxide spacers. The resulting structure is then used to form contact hole in between the oxide spacers. Because the oxide spacers are used--without the need for a tightly toleranced mask--to delimit the area of the contact at the bottom of the hole, a larger area of contact is obtained in addition to the tapered edges that are formed. Polycide is chosen to be a multilayer structure comprising tungsten-silicide (WSi.sub.2) over poly-silicon (poly-Si). Next, polycide is patterned by etching with a recipe which etches the WSi.sub.2 faster than it etches the underlying poly-Si. The etching, therefore, results in a structure where the WSi.sub.2 forms a step over the poly-Si layer. A layer of TEOS oxide is then deposited over the step structure and etched, thus forming oxide spacers surrounding the step structure. A second layer of TEOS is deposited and etched forming contact holes with the desired, gentle slopes yielding at the same time wid…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.