Process for polishing a semiconductor device substrate
US5916011A · kind A · utility
44Cited by
8References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 26, 1996 |
| Grant date | Jun 29, 1999 |
| Priority date | — |
| Expiry date | Dec 26, 2016 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/24
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A polishing pad (34) with a poromeric structure polishes two dissimilar materials (56, 58). By using a relatively softer pad. and conditioning, relatively constant times can be used for polishing the dissimilar materials (56, 58). This makes polishing more predictable and increases the number of substrates that can be polished using a single polishing pad (34). Polishing pads (34) are typically changed when other maintenance is performed on the polisher rather than when the polishing rate becomes too low.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.