Lateral gate vertical drift region transistor
US5917203A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1997 |
| Grant date | Jun 29, 1999 |
| Priority date | — |
| Expiry date | Mar 31, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A lateral gate, vertical drift region transistor including a drain positioned on one surface of a substrate and a doped structure having a buried region therein positioned on the other surface of the substrate. The buried region defining a drift region in the doped structure extending vertically from the substrate and further defining a doped region in communication with the drift region and adjacent the surface of the doped structure. A source positioned on the doped structure in communication with the doped region and an implant region positioned in the doped region adjacent the surface and in communication with the source and buried region. An insulating layer positioned on the doped structure with a metal gate positioned on the insulating layer so as to define an inversion region in the implant region extending laterally adjacent the control terminal and communicating with the drift region and the source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.