Interconnection of a carrier substrate and a semiconductor device
US5920125A · kind A · utility
29Cited by
13References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 1997 |
| Grant date | Jul 6, 1999 |
| Priority date | — |
| Expiry date | May 9, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Solder interconnection for forming connections between an integrated semiconductor device and a carrier substrate is provided. Located on the carrier substrate are electrodes and located between the electrodes and integrated semiconductor device are solder connections that have a relatively low melting point such that when the device is in operation, the solder connection will liquify thereby permitting expansion compensation between the substrate and semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.