MOS field effect transistor and its manufacturing method
US5923985A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Jan 14, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/314
Abstract
A method of manufacturing a MOS field effect transistor comprises forming on a semiconductor substrate a first epitaxial growth layer having an impurity doping concentration lower than that of the semiconductor substrate, forming on the first epitaxial growth layer a second epitaxial growth layer having an impurity concentration higher than that of the first epitaxial growth layer and having a thickness equal to or less than a diffusion depth of a source and a drain region, and forming on the second eptiaxial growth layer a third epitaxial growth layer having an impurity concentration lower than that of the second epitaxial growth layer and having a thickness equal to or less than that of a depletion layer at a channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.