Method to protect alignment mark in CMP process
US5923996A · kind A · utility
20Cited by
12References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 2, 1997 |
| Grant date | Jul 13, 1999 |
| Priority date | — |
| Expiry date | Jun 2, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is disclosed for forming alignment marks at the outer perimeter of wafers where they are not susceptible to much damage during chemical-mechanical polishing (CMP) process. Complete protection is provided by recessing the alignment mark into the substrate by etching. Recess etching is accomplished at the same time the isolation trenches are followed to delineate device areas. Thus, alignment marks are provided with a protective recess without extra steps. Furthermore, by forming alignment marks at the outer perimeter of the wafer, productivity is improved by providing maximum usage of wafer area for integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.