MOS circuit configuration for switching high voltages on a semiconductor chip
US5925905A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1997 |
| Grant date | Jul 20, 1999 |
| Priority date | — |
| Expiry date | Jul 24, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The MOS circuit configuration allows switching high voltages on a semiconductor chip. In order to switch a high negative voltage, for example as a programming voltage on the word line of a flash-memory, two circuit variants are given which are formed only with transistors of the same conductivity type as the substrate. The substrate and the transistors formed in the well are p-conductive. In this way it is possible to dispense with deep insulating wells which require special technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.