Low cost and highly reliable chip-sized package
US5925934A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 1996 |
| Grant date | Jul 20, 1999 |
| Priority date | — |
| Expiry date | Jan 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention is directed to a chip-sized package (CSP) and method for making a CSP which is simple to manufacture, less costly and more compact, thus being truly a chip-sized package. The inventive CSP has a chip that has an array of chip ports on an active surface, such as an array of solder or metal bumps or any other conductive material. The chip may be held in a cavity of a frame by a pair of frame tie-bars. An encapsulant encapsulates the chip and portions of the chip ports located near the active surface, leaving portions of the chip ports located away from the active surface exposed. Package ports, such as solder balls may be attached to the portions of the chip ports located away from the active surface and used to attach the CSP to a printed circuit board. Various methods are used to leave portions of the chip ports located away from the active surface exposed from the encapsulant. The encapsulant may be removed by laser or grinding to expose portions of the chip ports. Alternatively, prior to encapsulation, the chip ports are positioned to sit on a mold, so that removing the mold leaves exposed the portions of the chip ports that were in contact with the mold. The mold m…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.