Method of fabricating semiconductor device having stacked layer substrate
US5926699A · kind A · utility
33Cited by
12References
19Claims
0Family size
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Key dates
| Filing date | Jun 2, 1998 |
| Grant date | Jul 20, 1999 |
| Priority date | — |
| Expiry date | Jun 2, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/977
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of fabricating a semiconductor device comprises the steps of sequentially forming a first gate electrode and an insulating film over a transparent support substrate, forming a through-hole in the insulating film, forming a semiconductor single crystal silicon thin film over the transparent support substrate by epitaxial growth in the through-hole of the insulating film, forming a transistor element having a channel region formed in the semiconductor single crystal silicon thin film, and forming a second gate electrode over and electrically insulated from the channel region of the transistor element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.