Memory module having memory devices containing internal device ID registers and method of initializing same
US5928343A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 16, 1998 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Jun 16, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for assigning identification values to memories. A master resets identifiers of a first memory and a second memory by sending a reset signal on a line that is coupled in a daisy-chained manner to the first and second memories and also coupled to the master. The master places a first identification value on a data bus coupled to the master and to the first and second memories. The first memory stores the first identification value on the data bus as an identifier for the first memory when the master sends a first storage signal to the first memory via the daisy-chained line. The master places a second identification value on the data bus. The second memory stores the second identification value on the data bus as an identifier for the second memory when the master sends a second storage signal to the second memory via the daisy-chained line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.