Floating gate type non-volatile semiconductor memory for storing multi-value information
US5929479A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 21, 1997 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Oct 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/687
Abstract
A non-volatile semiconductor memory cell comprises a diffused layer or silicide layer formed in a surface of semiconductor substrate within an opening of an insulating layer formed on the semiconductor substrate, a first floating gate electrode formed on a first gate insulator film formed on the diffused or silicide layer within the opening of the insulating layer, and a semiconductor thin film formed to cover a second gate insulator film formed on the first floating gate electrode. The semiconductor thin film includes a channel region positioned above the first floating gate electrode and a pair of source/drain regions separated from each other by the channel region. The memory cell also includes a second floating gate electrode formed on a third gate insulator film formed on the semiconductor thin film, and a second control gate electrode formed on a fourth gate insulator film formed on the second floating gate electrode. Thus, a first floating gate transistor is formed of the channel region, the pair of source/drain regions, the first floating gate electrode and the first control electrode, and a second floating gate transistor is formed of the channel region, the pair of source…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.