Method and structure for channel length reduction in insulated gate field effect transistors
US5929496A · kind A · utility
Inventors
Key dates
| Filing date | Dec 18, 1997 |
| Grant date | Jul 27, 1999 |
| Priority date | — |
| Expiry date | Dec 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/514
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure are provided for an IGFET which has a highly scalable short conduction channel length. The short channel IGFET functions more rapidly than do longer conduction channel devices. Lightly doped regions provide a graded extension or buffer region to the conduction channel. Thus, the voltage drop is shared by the source/drain and channel, in contrast to an abrupt n+/p junction where the almost the entire voltage drop occurs across the lightly doped (channel) side of the junction. This method and structure preserves the integrity of the IGFET by protecting the gate from "hot electron injection." The method and structure provide an IGFET with increased performance without compromising the IGFET's reliability or longevity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.