Robert Paiz
17Patents
10h-index
10Co-inventors
58Inventor score
Filing activity: Oct 8, 1996 → Sep 30, 1998
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6194283A | High density trench fill due to new spacer fill method including isotropically etching silicon nitride spacers | Electricity | 47 | Expired |
| US5918133A | Semiconductor device having dual gate dielectric thickness along the channel and fabrication thereof | Electricity | 37 | Expired |
| US6051487A | Semiconductor device fabrication using a sacrificial plug for defining a region for a gate electrode | Electricity | 26 | Expired |
| US6148832A | Method and apparatus for in-situ cleaning of polysilicon-coated quartz furnaces | Chemistry; Metallurgy | 17 | Expired |
| US5942787A | Small gate electrode MOSFET | Emerging Cross-Sectional Technologies | 17 | Expired |
| US5851307A | Method for in-situ cleaning of polysilicon-coated quartz furnaces | Emerging Cross-Sectional Technologies | 15 | Expired |
| US6160316A | Integrated circuit utilizing an air gap to reduce capacitance between adjacent metal linewidths | Electricity | 13 | Expired |
| US5946581A | Method of manufacturing a semiconductor device by doping an active region after formation of a relatively thick oxide layer | Electricity | 13 | Expired |
| US5863818A | Multilevel transistor fabrication method having an inverted, upper level transistor | Electricity | 11 | Expired |
| US6140191A | Method of making high performance MOSFET with integrated simultaneous formation of source/drain and gate regions | Electricity | 10 | Expired |
| US6309936A | Integrated formation of LDD and non-LDD semiconductor devices | Electricity | 9 | Expired |
| US6037244A | Method of manufacturing a semiconductor device using advanced contact formation | Electricity | 9 | Expired |
| US6727569B1 | Method of making enhanced trench oxide with low temperature nitrogen integration | Electricity | 6 | Expired |
| US5970350A | Semiconductor device having a thin gate oxide and method of manufacture thereof | Electricity | 5 | Expired |
| US6043533A | Method of integrating Ldd implantation for CMOS device fabrication | Electricity | 3 | Expired |
| US5929496A | Method and structure for channel length reduction in insulated gate field effect transistors | Electricity | 2 | Expired |
| US6214123A | Chemical vapor deposition systems and methods for depositing films on semiconductor wafers | Chemistry; Metallurgy | 1 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.