Patent · US Expired

Method of making a low parasitic resistor on ultrathin silicon on insulator

US5930638A · kind A · utility

107Cited by
59References
39Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 19, 1997
Grant dateJul 27, 1999
Priority date
Expiry dateAug 19, 2017

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY10S148/136
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A diffused resistor and a method for making the diffused resistor are disclosed. The diffused resistor is formed in a substantially pure portion of the thin semiconductor layer that is formed on an insulating substrate. The thin semiconductor layer has low a number of defects and mid-band gap states. This portion may be located in an electrically isolated region of the thin semiconductor layer. A resistive region is used to provide the resistance of the diff-used resistor. Contact regions are provided continguous with the the resistive region. The diff-used resistor can be formed by themselves or in conjunction with other circuit elements, such as a MOSFET, for example. Accordingly, also disclosed is a method for making the diffused resitor in conjunction with a MOSFET. The diffused resistor and the MOSFET are formed in electrically isolated semiconductor islands. The electrically isolated semiconductor islands are formed from the high quality thin semiconductor layer. Both non-silicide and silicide processes are disclosed. Also disclosed is a differential amplifier circuit that uses the disclosed diffused resistor embodiments.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.