Predictive arbitration system for PCI bus agents
US5933610A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 1996 |
| Grant date | Aug 3, 1999 |
| Priority date | — |
| Expiry date | Sep 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/364
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A predictive arbitration system for interfacing a plurality of peripheral component interconnect (PCI) agents coupled to a first PCI bus with a second PCI bus. In one embodiment, the present predictive arbitration system includes a first PCI bus adapted to transmit data signals. A plurality of PCI agents are coupled to the first PCI bus. A predictive arbiter is coupled to both the first PCI bus and a second PCI bus. The predictive arbiter is also coupled to the plurality of PCI agents. The predictive arbiter is configured to receive requests for access to the first or second PCI bus from any of the plurality of PCI agents. The predictive arbiter, upon receiving requests for access, transmits one of the requests to a second arbiter coupled to the second PCI bus, wherein the selected and transmitted request originates from a selected one of the plurality of PCI agents. The predictive arbiter is also adapted to receive a grant signal from the second arbiter in response to the selected and transmitted request. The predictive arbiter further comprises a predictive arbitration system for enabling a grant line coupled to the selected one of the plurality of PCI agents before the grant sig…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.