High speed MOS-technology power device integrated structure, and related manufacturing process

US5933734A · kind A · utility

Assignee

• SGS-Thomson Microelectronics S.A. · IT

Inventors

• Giuseppe Ferla · Catania, IT
• Ferruccio Frisina · Gravina di Catania, IT

Key dates

• Filing date: Mar 4, 1997
• Grant date: Aug 3, 1999
• Expiry date: Mar 4, 2017

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/519

Abstract

A high-speed MOS-technology power device integrated structure includes a plurality of elementary functional units formed in a lightly doped semiconductor layer of a first conductivity type, the elementary functional units including channel regions of a second conductivity type covered by a conductive insulated gate layer including a polysilicon layer; the conductive insulated gate layer also including a highly conductive layer superimposed over the polysilicon layer and having a resistivity much lower than the resistivity of the polysilicon layer, so that a resistance introduced by the polysilicon layer is shunted with a resistance introduced by the highly conductive layer and the overall resistivity of the insulated gate layer is lowered.