MOS transistor with impurity-implanted region
US5936277A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 22, 1996 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Oct 22, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A MOS transistor includes a semiconductor substrate of a first conductivity type having a major surface, a source and drain of a second conductivity type formed on the major surface to define a channel region therebetween, and a gate arranged in the channel region via an insulating film. The MOS transistor includes an impurity-implanted region of the first conductivity type located at a substrate portion which is deeper than the channel region and is shifted to a source side from a region corresponding to the channel region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.