Electronic device and semiconductor memory device using the same
US5936912A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 1998 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Mar 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0816
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a first circuit which refers to an external clock and thus produces a first internal clock, and a second circuit which refers to the first internal clock and thus produces a second internal clock. The first circuit has a first phase error between the external clock and the first internal clock, and the second circuit has a second phase error between the first internal clock and the second internal clock. The first phase error has a sign reverse to that of the second phase error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.