Circuit arrangement for translating platform-independent instructions for execution on a hardware platform and method thereof
US5937193A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 27, 1996 |
| Grant date | Aug 10, 1999 |
| Priority date | — |
| Expiry date | Nov 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45504
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A translating circuit coupled to a processor and memory of a computer system translates platform-independent instructions such as Java bytecodes into corresponding native instructions for execution by the processor. In one embodiment, the translating circuit is incorporated into the same integrated circuit device as the processor. In another embodiment, the translating circuit is provided within one or more external integrated circuit devices. One or more look-up tables map platform-independent instructions into one or more native instructions for the processor, thereby minimizing software-based interpretation of platform-independent program code. Moreover, platform-independent instructions are mapped to native instructions on-the-fly, or alternatively, in blocks prior to execution using a state machine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.