Alignment chips positioned in the peripheral part of the semiconductor substrate and method of manufacturing thereof
US5939132A · kind A · utility
8Cited by
8References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1997 |
| Grant date | Aug 17, 1999 |
| Priority date | — |
| Expiry date | Apr 14, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
On a semiconductor substrate, chips to be products and alignment chips located at a portion a part thereof is left out from a peripheral part of the semiconductor substrate are formed. Contact holes and alignment marks are formed at the chips to be products and the alignment chips. Covering the alignment chips with alignment mark cover parts of a substrate holder, a material for metal wiring is deposited on the semiconductor substrate to form a metal film on the substrate. A mask pattern is formed on the metal film using the alignment marks of the alignment chips on which the metal film is not formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.