Recursive voltage boosting technique
US5940333A · kind A · utility
17Cited by
2References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 8, 1998 |
| Grant date | Aug 17, 1999 |
| Priority date | — |
| Expiry date | Jul 8, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A recursive voltage booster circuit is provided for generating a boosted output voltage to be higher than the low power supply potential to drive control gates via row decoder circuits and wordlines in an array of Flash EEPROM memory cells during a Read mode of operation. The voltage booster circuit includes a plurality of recursively connected boosting stages. The lower power supply potential has a voltage of +2.0 volts or lower. The boosted output voltage is significantly higher than what is traditionally available so as to enable reading of Flash EEPROM memory cells in a very low power supply voltage environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.