Method to fabricate the thin film transistor
US5943560A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1996 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Apr 19, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/30625
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Ultrahigh vacuum chemical vapor deposition (UHV/CVD) and chemical mechanical polishing (CMP) systems are used in a method which can fabricate polycrystalline silicon (poly-Si) and polycrystalline silicon-germanium (poly-Si.sub.1-x -Ge.sub.x) thin film transistors at low temperature and low thermal budget. Poly-Si and poly-Si.sub.1-x -Ge.sub.x can be deposited by UHV/CVD without any anneal step. And due to the ultra low base pressure and ultraclean growth environment, the As-deposited poly films have low defect densities. However, the surface morphology retards the usage of the fabricating top-gate poly TFT's. In this invention, the CMP system is used for improving the surface morphology, high performance poly-Si and poly-Si.sub.1-x -Ge.sub.x TFT's can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.