Method of fabricating a static random access memory
US5943566A · kind A · utility
2Cited by
7References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 26, 1998 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | May 26, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/163
Abstract
After the formation of a gate oxide layer, a polysilicon layer is formed right away. The polysilicon layer is used for patterning the gate oxide layer. The photolithography and etching processes of forming the buried contact window are combined with the step of removing the gate oxide layer at the periphery circuit region. Then, after the formation of the gate oxide layer at the memory cell region, one thermal oxidation process is performed to form the gate oxide layer at the periphery circuit region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.