Method of manufacturing a semiconductor device having an element isolating region
US5943578A · kind A · utility
16Cited by
9References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 1997 |
| Grant date | Aug 24, 1999 |
| Priority date | — |
| Expiry date | Apr 25, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
Abstract
The first trench is formed in the region of the semiconductor substrate, in which an element isolation region is to be formed, and the first buried member, which is insulative, is buried in the first trench. Then, the second trench, having a width smaller than that of the first trench, is made in the first buried member, and the portion of the semiconductor substrate which is located at the bottom portion of the first trench, and the insulating second buried member is buried in the second trench, thereby forming the element isolation region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.