Method for manufacturing an electronic structure
US5946600A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 1997 |
| Grant date | Aug 31, 1999 |
| Priority date | — |
| Expiry date | Apr 8, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1142
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for manufacturing an electronic interconnect structure, the process including the steps of depositing an adhesion metal layer over a dielectric material surface having at least one exposed aluminum surface; depositing a barrier metal layer over the adhesion metal layer; depositing a first layer of aluminum over the barrier metal layer; depositing an intermediate barrier metal layer over the first layer of aluminum; applying a photoresist layer on top of the intermediate barrier metal layer; exposing and developing the photoresist layer; removing the exposed barrier metal and photoresist layer, leaving a layer of barrier metal over the aluminum layer; converting those portions of the layer of aluminum which are not covered by barrier metal to a porous aluminum oxide by porous anodization; removing the porous aluminum oxide; and removing the exposed barrier metal and adhesion metal layers to leave exposed patterned aluminum, and an electronic interconnect structure manufactured by this method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.