Apparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytes
US5948096A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 23, 1997 |
| Grant date | Sep 7, 1999 |
| Priority date | — |
| Expiry date | Dec 23, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3816
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A self-timed instruction marking circuit includes a prefix handling system for processing instruction bytes having prefix bytes. Length decoders receive instruction data bytes, and perform length decoding independently of the other length decoders in the instruction marking circuit. A length decoder determines whether a byte being processed is a prefix byte to an instruction. If a length-affecting prefix byte is found, the length decoder signals a subsequent length decoder to indicate that a prefix byte has been found. The subsequent length decoder uses the prefix signal to appropriately length decode the byte being processed by the subsequent length decoder. Signals are provided to continue the self-timed marking process. Prefix handling may also be used in a multiple marking unit configuration of an instruction marking circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.