Method and apparatus for coupled phase locked loops
US5949262A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 1998 |
| Grant date | Sep 7, 1999 |
| Priority date | — |
| Expiry date | Jan 7, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus are provided for generating synchronized clock signals. According to the method and apparatus, first and second pluralities of signals are generated, having time-varying phase differences with respect to a reference clock. The first clock is supplied by a succession of signals from among the first plurality of signals, in which one of the signals succeeds another responsive to a first phase difference. The second clock is supplied by a second succession of signals from among the second plurality of signals. One signal in the second succession of signals succeeds another responsive to a second phase difference. The succession among the first plurality of signals is also responsive to the second phase difference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.