John Stephen Muhich
50Patents
20h-index
41Co-inventors
84Inventor score
Filing activity: Feb 13, 1985 → Jul 30, 1999
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5611058A | System and method for transferring information between multiple buses | Physics | 93 | Expired |
| US6021485A | Forwarding store instruction result to load instruction with reduced stall or flushing by effective/real data address bytes matching | Physics | 84 | Expired |
| US5437017A | Method and system for maintaining translation lookaside buffer coherency in a multiprocessor data processing system | Physics | 73 | Expired |
| US5870582A | Method and apparatus for completion of non-interruptible instructions before the instruction is dispatched | Physics | 58 | Expired |
| US5463739A | Apparatus for vetoing reallocation requests during a data transfer based on data bus latency and the number of received reallocation requests below a threshold | Physics | 42 | Expired |
| US5887161A | Issuing instructions in a processor supporting out-of-order execution | Physics | 40 | Expired |
| US5706464A | Method and system for achieving atomic memory references in a multilevel cache data processing system | Physics | 40 | Expired |
| US5931957A | Support for out-of-order execution of loads and stores in a processor | Physics | 39 | Expired |
| US5913048A | Dispatching instructions in a processor supporting out-of-order execution | Physics | 34 | Expired |
| US5872950A | Method and apparatus for managing register renaming including a wraparound array and an indication of rename entry ages | Physics | 31 | Expired |
| US5442766A | Method and system for distributed instruction address translation in a multiscalar data processing system | Physics | 29 | Expired |
| US6098167A | Apparatus and method for fast unified interrupt recovery and branch recovery in processors supporting out-of-order execution | Physics | 26 | Expired |
| US5500950A | Data processor with speculative data transfer and address-free retry | Physics | 24 | Expired |
| US5802571A | Apparatus and method for enforcing data coherency in an information handling system having multiple hierarchical levels of cache memory | Physics | 23 | Expired |
| US6070238A | Method and apparatus for detecting overlap condition between a storage instruction and previously executed storage reference instruction | Physics | 22 | Expired |
| US6389585B1 | Method and system for building a multiprocessor data processing system | Physics | 22 | Expired |
| US4742350A | Software managed video synchronization generation | Physics | 22 | Expired |
| US6014047A | Method and apparatus for phase rotation in a phase locked loop | Electricity | 20 | Expired |
| US6021512A | Data processing system having memory sub-array redundancy and method therefor | Physics | 20 | Expired |
| US4706074A | Cursor circuit for a dual port memory | Physics | 20 | Expired |
| US5758120A | Method and system for increased system memory concurrency in a multi-processor computer system utilizing concurrent access of reference and change bits | Physics | 19 | Expired |
| US5640518A | Addition of pre-last transfer acknowledge signal to bus interface to eliminate data bus turnaround on consecutive read and write tenures and to allow burst transfers of unknown length | Physics | 19 | Expired |
| US5949262A | Method and apparatus for coupled phase locked loops | Physics | 19 | Expired |
| US5870612A | Method and apparatus for condensed history buffer | Physics | 18 | Expired |
| US6266767A | Apparatus and method for facilitating out-of-order execution of load instructions | Physics | 17 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.