Electrically modifiable non-volatile memory circuit having means for autonomous refreshing dependent upon on periodic clock pulses
US5950224A · kind A · utility
18Cited by
5References
52Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 12, 1997 |
| Grant date | Sep 7, 1999 |
| Priority date | — |
| Expiry date | Feb 12, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3431
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically modifiable multilevel non-volatile memory has autonomous refresh means. The multilevel memory has a real-time clock delivering pulses to periodically activate an operation for refreshing the memory cells of the main matrix. The memory has application to the field of large-capacity memories, for example, several tens of megabits and more.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.