Removal rate behavior of spin-on dielectrics with chemical mechanical polish
US5952243A · kind A · utility
29Cited by
11References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1996 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Jun 24, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a gap-filled, planarization structure of dielectric materials on a substrate topography useful for forming microelectronic devices. A dielectric material is first deposited as continuous, dry dielectric layer, preferably a SOG layer. Then the dielectric layer is partially removed by chemical-mechanical polishing (CMP). The chemical and mechanical properties of the structure can be chosen by varying the composition of the SOG layer and the subsequent CMP conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.