Semiconductor device having a multilevel interconnection structure
US5952723A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 1997 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Mar 27, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device has a multilevel interconnection structure that includes an insulating interlayer formed on a lower wiring layer, a semiconductor substrate, and at least one via hole. The via plug partially fills the via hole, and the upper surface of the via plug may have a convex shape or a surface of the lower wiring layer at a bottom of the via hole may have a concave shape. Where two via holes are present, one via plug substantially fills the shallowest via hole, and partially fills the deepest via hole. The upper wiring layer may be formed over the via plug to fill a remaining portion of the via hole not filled by the via plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.