Redundant memory array
US5953745A · kind A · utility
20Cited by
20References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 1996 |
| Grant date | Sep 14, 1999 |
| Priority date | — |
| Expiry date | Nov 27, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/846
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A set associative cache memory array includes redundant memory portions for use in the case of a defective portion of the memory. Information is stored within the defective portion of the memory array and an identical copy is stored within the redundant portion. Additionally, reading of the information is done from both the defective portion and the redundant portion. Selection of the information from either the defective portion or the redundant portion is made using programmable circuitry such as a fuse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.