Precision power-on reset circuit
US5959477A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 2, 1998 |
| Grant date | Sep 28, 1999 |
| Priority date | — |
| Expiry date | Jun 2, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A precision power-on reset circuit which is highly insensitive to temperature and process variations includes a self-biased proportional-to-absolute-temperature (PTAT) current generator 4, a base-emitter (V.sub.BE) voltage detector 6, and a bipolar complementary metal oxide semiconductor (BiCMOS) inverter 8, which generates a power-on reset pulse for resetting an application circuit when a power supply voltage is turned on. The power-on reset circuit may further include a complementary metal oxide semiconductor (CMOS) buffer 10 coupled to the BiCMOS inverter 8 to isolate the application circuit from currents in the power-on reset circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.