Voltage level shifter device, particulary for a nonvolatile memory
US5959902A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1998 |
| Grant date | Sep 28, 1999 |
| Priority date | — |
| Expiry date | Feb 25, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a first operation mode the level shifter transmits as output a logic input signal and in a second operation mode it shifts the high logic level of the input signal from a low to a high voltage. The level shifter comprises a CMOS switch and a pull-up transistor; the CMOS switch comprises an NMOS transistor and a PMOS transistor which are connected in parallel between the input and the output of the shifter and have respective control terminals connected to a first supply line at low voltage and, respectively, to a control line connected to ground in the first operation mode and to the high voltage in the second operation mode; the pull-up transistor is connected between the output of the shifter and a second supply line switchable between the low voltage and the high voltage and has a control terminal connected to the first supply line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.