Cell-based integrated circuit design repair using gate array repair cells
US5959905A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 31, 1997 |
| Grant date | Sep 28, 1999 |
| Priority date | — |
| Expiry date | Oct 31, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/907
Abstract
Repair cells for performing metal-only functional repairs in a cell-based circuit layout design are described. The repair cells include a gate array under layer made-up of a group of uncommitted (not interconnected) transistors. A cluster of cells can be placed within the cell-based design in various locations and can be coupled together to form logic function elements. The repair cells can be added to cell-based designs during the metalization processing steps so as to repair/change the cell-based design's function. Furthermore, repair cells can be used as feedthrough cells to facilitate routing in the cell-based circuit layout. In this case, feedthrough cells having gate array underlayers may be arranged in columns or are placed in strategic spots within the layout to facilitate routing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.