Method and apparatus for analyzing a main memory configuration to program a memory controller
US5960462A · kind A · utility
116Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 1996 |
| Grant date | Sep 28, 1999 |
| Priority date | — |
| Expiry date | Sep 26, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for analyzing the configuration of a computer main memory. A complex memory controller which imposes restrictions on the memory's configuration, determines whether a configuration is consistent with those restrictions. The results of the determination are then reported to the user, the memory controller assesses a memory configuration's compliance with interleave restrictions, memory row size restrictions, and memory speed restrictions. In addition to reporting restriction non-compliance, the memory controller can also assess and report whether a particular configuration is optimal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.