Microprocessor with circuits, systems, and methods for selecting alternative pipeline instruction paths based on instruction leading codes
US5961632A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 1997 |
| Grant date | Oct 5, 1999 |
| Priority date | — |
| Expiry date | Jul 25, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor processes a plurality of instructions according to a disclosed method. First, the method receives (32) an instruction from the plurality of instructions. Second, the method determines (34) whether the received instruction is preceded by an instruction path leading code. Third, the method passes (36 or 38) the received instruction along at least one instruction path in a plurality of instruction paths. Fourth, in response to determining that the received instruction is preceded by an instruction path leading code, the method executes a machine word corresponding to the received instruction and selected from one of the plurality of instruction paths. Specifically, the selected instruction path is selected in response to the instruction path leading code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.