Method and apparatus for efficiently implementing complex function blocks in integrated circuit designs
US5963454A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 1996 |
| Grant date | Oct 5, 1999 |
| Priority date | — |
| Expiry date | Sep 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method in accordance with the present invention for developing an integrated circuit design using a compilation tool includes: (A) developing at least one HDL template by: (a) creating the HDL template; (b) creating a parameter file and a parameter check file for the HDL template; and (c) encrypting the HDL template; (B) developing design specifications for use in creating HDL for synthesis and for use in compiling one or more macro blocks; (C) creating the HDL for synthesis; and (D) creating netlists for at least one macro block instantiated in the HDL template using the design specifications. A development tool of the present invention implements the method on a computer system to form a portion of an integrated circuit fabrication system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.