Semiconductor device including field effect transistor
US5965918A · kind A · utility
35Cited by
3References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 18, 1999 |
| Grant date | Oct 12, 1999 |
| Priority date | — |
| Expiry date | Mar 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76283
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An insulating film having a low dielectric constant lower than that of silicon oxide is arranged between a silicon support layer and a silicon active layer. A channel region, source/drain regions, and a device isolation region are formed in the active layer. A gate electrode is arranged on the channel region through a gate insulating film. The active layer is covered with a TEOS film in which contact holes are formed. The contact holes are filled with wiring layers connected to the source/drain regions and the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.