Method of forming an integrated circuit having both low voltage and high voltage MOS transistors

US5970345A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Sunil Hattangady · McKinney, US
• George R. Misium · Plano, US

Key dates

• Filing date: Oct 22, 1998
• Grant date: Oct 19, 1999
• Expiry date: Oct 22, 2018

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/981

Abstract

The invention comprises an integrated circuit having both low voltage and high voltage MOS transistors and a method for making the integrated circuit. In accordance with the method of making the integrated circuit, a first oxide layer is formed outwardly from a semiconductor substrate comprising a low voltage region and a high voltage region. A sacrificial layer is formed outwardly from the first oxide layer. The part of the sacrificial layer disposed outwardly from the low voltage region is removed to form an intermediate structure. The intermediate structure is selectively etched to remove the part of the first oxide layer disposed outwardly from the low voltage region. A second oxide layer is then formed comprising a first area disposed outwardly from the low voltage region and second area disposed outwardly from the high voltage region. The formation of the second oxide layer in the second area consumes the sacrificial layer.