Method for manufacturing MOS transistor
US5972764A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 1999 |
| Grant date | Oct 26, 1999 |
| Priority date | — |
| Expiry date | Mar 16, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/976
Abstract
A method for manufacturing a metal-oxide-semiconductor (MOS) transistor is described. In the invention, doped regions of the local pocket type are formed in the substrate after the source/drain terminals of a MOS transistor in the logic circuit area are formed. The method includes the steps of forming an insulation layer over the entire substrate. Then, a portion of the insulation layer is removed to expose the spacers on the sidewalls of the gate electrode. Subsequently, the spacers are removed, and then an ion implantation operation is conducted to implant dopants into the substrate through the windows formed by the uprooted spacers. Ultimately, doped regions of the local pocket type are formed in the substrate under the lightly doped drain source/drain terminals of a MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.