Read-only-memory cell arrangement using vertical MOS transistors and gate dielectrics of different thicknesses and method for its production

US5973373A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Wolfgang Krautschneider · Ottobrunn, DE
• Lothar Risch · Neubiberg, DE
• Franz Hofmann · Munich, DE
• Wolfgang Rosner · Hersbruck, DE

Key dates

• Filing date: Mar 26, 1997
• Grant date: Oct 26, 1999
• Expiry date: Mar 26, 2017

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B20/00

Abstract

A read-only-memory cell arrangement comprises memory cells, each having a vertical MOS transistor, in a substrate (21) made of semiconductor material, the various logic values (zero, one) being implemented by gate dielectrics (27, 28) of different thickness. The memory cell arrangement can preferably be produced in a silicon substrate, with a small number of process steps and a high packing density. The memory cell arrangement and a drive circuit for read-out can in this case be produced in an integrated manner.