Power savings technique in solid state integrated circuits
US5973552A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 4, 1996 |
| Grant date | Oct 26, 1999 |
| Priority date | — |
| Expiry date | Nov 4, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0016
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power saving circuit for metal oxide silicon field effect transistors (MOSFETS) comprised of an MOS circuit comprising low threshold voltage MOSFETs, at least one MOS FET switch connected in series between the low threshold MOSFET and a power rail, at least one MOSFET switch being of low threshold voltage type similar to MOSFETS used in the MOS circuit, and apparatus for applying at least one control signal to the at least one MOSFET switch for enabling the at least one MOSFET switch to turn on and off, the at least one control signal having a voltage of at least one of VPP and VBB, wherein VPP is more positive than a normal power rail operating voltage VDD, and VBB is more negative than a normal opposite power rail operating voltage VSS.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.